Cadence Accelerates System Innovation with Breakthrough Integrity 3-d-IC Platform

Date-07/10/2021

Industry’s first complete 3-d-IC platform for multi-chiplet design and superior packaging Highlights:

  • Integrity 3-D-IC integrates design making plans, implementation and gadget evaluation in a single, unified cockpit
  •  Designers can attain system-pushed PPA via the availability of included thermal, power and static timing analysis skills
  •  Cadence’s third-era 3-d-IC solution supports a wide variety of software areas, which include hyperscale computing, client, 5G communications, mobile and automobile.

The Cadence® Integrity™ 3-D-IC platform is the industry’s first comprehensive, high-potential 3-d-IC platform that integrates 3-D design planning, implementation and system evaluation in a single, unified cockpit. (Graphic: Business Wire)

Cadence Design Systems, Inc. (Nasdaq: CDNS) nowadays announced the shipping of the Cadence® Integrity™ 3-d-IC platform, the enterprise’s first comprehensive, high-ability 3-D-IC platform that integrates 3D design planning, implementation and device evaluation in a unmarried, unified cockpit. The Integrity 3D-IC platform underpins Cadence’s 0.33-generation 3-d-IC answer, presenting customers with system-pushed power, overall performance and vicinity (PPA) for character chiplets thru incorporated thermal, power and static timing analysis capabilities.

Chip designers growing hyperscale computing, client, 5G communications, cellular and car packages can acquire more productiveness with the Integrity three-D-IC platform as opposed to a disjointed die-through-die implementation method. The platform uniquely presents gadget making plans, incorporated electrothermal, static timing analysis (STA) and bodily verification flows, enabling faster, brilliant 3D layout closure. It also incorporates three-D exploration flows, which take 2D design netlists to create a couple of 3D stacking eventualities based totally on user enter, automatically choosing the most desirable, final 3D stacked configuration. Furthermore, the platform database supports all three-D layout types, letting engineers create designs at more than one method nodes simultaneously and carry out seamless co-layout with package deal layout teams and outsourced semiconductor meeting and check (OSAT) corporations that use Cadence Allegro® packaging technologies

 

Cadence Accelerates System 3D-IC Platform

Customers the use of the Integrity 3-d-IC platform have get right of entry to to the subsequent features and benefits:

  • Common cockpit and database: Lets SoC and bundle layout teams co-optimize the entire machine simultaneously, allowing system-level comments to be incorporated efficiently.
  • Complete making plans machine: Incorporates a complete 3D-IC stack making plans system for all forms of 3-d designs, enabling clients to control and put in force native 3-D stacking.
  • Seamless implementation tool integration: Provides ease of use thru direct script-primarily based integration with the Cadence Innovus™ Implementation System for high-ability virtual designs with 3D die partitioning, optimization and timing flows.
  • Integrated device-degree analysis skills: Enables strong 3D-IC layout through early electrothermal and cross-die STA, which allows early machine-degree feedback for machine-driven PPA.
  • Co-design with the Virtuoso® Design Environment and Allegro packaging technologies: Allows engineers to seamlessly circulate design statistics from Cadence analog and packaging environments to special elements of the machine via the hierarchical database, permitting faster design closure and advanced productiveness.
  • Easy-to-use interface: Includes a effective person cockpit with a waft supervisor that gives designers with a uniform, interactive manner to run relevant gadget-level three-D system evaluation flows.

“Cadence has traditionally provided clients robust 3D-IC packaging answers through its leading virtual, analog and bundle implementation product lines,” stated Dr. Chin-Chi Teng, senior vp and fashionable manager in the Digital & Signoff Group at Cadence.”Era with machine-level making plans and evaluation. As the industry keeps to move in the direction of different configurations of 3-D stacked dies, the brand new Integrity 3D-IC platform lets customers acquire gadget-driven PPA, reduced layout complexity and quicker time to marketplace.”

The Integrity 3-d-IC platform is part of the wider Cadence 3-D-IC solution portfolio, which is going beyond virtual and consists of system and verification and IP capabilities. The broader answer provides hardware and software program co-verification and electricity evaluation of the overall device through the Dynamic Duo, which includes the Palladium® Z2 and Protium™ X2 structures. It also gives connectivity via chiplet-based PHY IP with PPA optimized for latency, bandwidth and electricity. The Integrity three-D-IC platform gives co-design abilties with the Virtuoso Design Environment and Allegro technology, incorporated IC signoff extraction and STA with the Quantus™ Extraction Solution and Tempus™ Timing Signoff Solution, and included sign integrity/electricity integrity (SI/PI), electromagnetic interference (EMI) and thermal analysis with the Sigrity™ technology portfolio, Clarity™ three-D Transient Solver and Celsius™ Thermal Solver. Both the new Integrity 3-D-IC platform and the wider 3-d-IC answer portfolio are constructed on a strong basis of SoC layout excellence and system-stage innovation, supporting the organization’s Intelligent System Design™ approach.

Cadence Accelerates System Innovation with Breakthrough Integrity 3D-IC Platform

Endorsements

“With 3D-IC layout persevering with to advantage momentum, there is an increased need to automate the making plans and partitioning of a 3-d stack die gadget greater correctly. As the arena-leading studies and innovation hub in nanoelectronics and virtual technologies and thru our longstanding collaboration with Cadence, we’ve effectively observed automated ways to partition designs to build an greatest 3-d stack with improved reachable memory bandwidth that pushes performance and lowers energy in advanced-node designs. The incorporated reminiscence on the good judgment float protected in Cadence’s Integrity 3D-IC platform allows cross-die planning, implementation and multi-die STA, which our studies groups established on a multi-core excessive-overall performance layout.”

Eric Beyne, senior fellow and application director, 3-D System Integration, imec

“To push AI acceleration the use of optical computing, we’ve continuously leveraged all of the brand new, innovative tendencies in the chip design industry—a key innovation being multi-chiplet stacking. In order to construct a heterogenous multi-chiplet stacked design, it’s miles crucial to have a fully integrated making plans and implementation gadget, which could constitute more than one generation nodes in a unmarried cockpit. The Cadence Integrity three-D-IC platform offers a unified database solution with implementation and early device-level analysis talents, consisting of timing signoff and electrothermal evaluation. It allows us deliver next-technology innovation using optical computing for AI acceleration.”

To meet our standard overall performance requirements, interposer routing wishes automation to be accurate-by way of using-production whilst considering vicinity, protective and machine integrity requirements. The Cadence Integrity three-D-IC platform is well included for best interposer implementation and machine analysis and gives speedy, whole system evaluation, permitting us to supply designs that meet reminiscence bandwidth needs for hyperscale computing and 5G communications.”

About Cadence

The organisation applies its underlying Intelligent System Design method to deliver software, hardware and IP that flip layout ideas into reality. Cadence clients are the area’s maximum modern corporations, turning in fantastic digital merchandise from chips to forums to structures for the maximum dynamic market applications, consisting of consumer, hyperscale computing, 5G communications, automobile, cellular, aerospace, industrial and healthcare. For seven years in a row, Fortune magazine has named Cadence one of the a hundred Best Companies to Work For.

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